• 100 pin QFP/LQFP
• Integrated Fast Ethernet MAC, Physical chip and transceiver in one chip
• 10 Mb/s and 100 Mb/s operation
• Supports 10 Mb/s and 100 Mb/s N-way Auto-negotiation operation
• Supports PCI multi-function capabilities
• PCI local bus single-chip Fast Ethernet controller
  • Compliant to PCI Revision 2.2
  • Supports PCI clock 16.75MHz-40MHz
  • Supports PCI target fast back-to-back transaction
  • Provides PCI bus master data transfers and PCI memory space or I/O space mapped data transfers of RTL8139D(L)’s operational registers
  • Supports PCI VPD (Vital Product Data)
  • Supports ACPI, PCI power management
  • Supports PCI multi-function to incorporate with other PCI master device
• Supports 25MHz crystal or 25MHz OSC as the internal clock source. The frequency deviation of either crystal or OSC must be within 50 PPM.
• Compliant to PC99 and PC2001 standards
• Supports Wake-On-LAN function and remote wake-up (Magic Packet*, LinkChg and Microsoft© wake-up frame)
• Supports 4 Wake-On-LAN (WOL) signals (active high, active low, positive pulse, and negative pulse)

• Supports auxiliary power-on internal reset, to be ready for remote wake-up when main power remains off
• Supports auxiliary power auto-detect, and sets the related capability of power management registers in PCI configuration space
• Includes a programmable, PCI burst size and early Tx/Rx threshold
• Supports a 32-bit general-purpose timer with the external PCI clock as clock source, to generate timer-interrupt
• Contains two large (2Kbyte) independent receive and transmit FIFOís
• Advanced power saving mode when LAN function or wakeup function is not used
• Uses 93C46 (64*16-bit EEPROM) to store resource configuration, ID parameter, and VPD data
• Supports LED pins for various network activity indications
• Supports loopback capability
• Half/Full duplex capability
• Supports Full Duplex Flow Control (IEEE 802.3x)
• 2.5/3.3V power supply with 5V tolerant I/Os
• Up to 128K byte Boot ROM interface for both EPROM and Flash memory is supported
• 0.25u CMOS process

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