Description
This is a used Intel SLAY7 E5200 Dual Core CPU in good working condition.
SLAY7 E5200 specifications
General information |
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| Type | CPU / Microprocessor |
| Family | Intel Pentium Dual-Core |
| Processor number | E5200 |
| Part number | EU80571PG0602M BX80571E5200 BXC80571E5200 |
| Frequency (GHz) | 2.5 |
| Bus speed (MHz) | 800 |
| Clock multiplier | 12.5 |
| Package type | 775-land FC-LGA8 |
| Socket type | Socket 775 (LGA775) |
Architecture / Micro-architecture / Other – SLAY7 E5200 |
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| CPUID | 010676h |
| Core stepping | M0 |
| Next stepping | QJLU |
| Next production stepping | SLB9T |
| Processor core | Wolfdale-3M |
| Manufacturing technology (micron) | 0.045 |
| Number of cores | 2 |
| L2 cache size (MB) | 2 |
| Features | EM64T technology Enhanced SpeedStep technology Execute disable bit Extended Halt state Extended Stop Grant state Thermal Monitor 2 |
| Core voltage (V) | 0.85 – 1.3625 |
| Case temperature (°C) | 74.1 |
| Thermal Design Power (Watt) | 65 |
Notes on Specs SLAY7 E5200 |
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SLAY7 CPUID information
| Intel Pentium Dual-Core SLAY7 E5200 | |||||||||
|---|---|---|---|---|---|---|---|---|---|
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General information
| Vendor: | Genuine Intel |
| Processor name (BIOS): | Pentium(R) Dual-Core CPU E5200 @ 2.50GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 10676 |
| Family: | 6 (06h) |
| Model: | 23 (017h) |
| Stepping: | 6 (06h) |
| TLB/Cache details: | 64-byte Prefetching Data TLB: 4-KB Pages, 4-way set associative, 256 entries Data TLB: 4-MB Pages, 4-way set associative, 32 entries Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
Cache details
| Cache: | L1 data | L1 instruction | L2 |
|---|---|---|---|
| Size: | 32 KB | 32 KB | 2 MB |
| Associativity: | 8-way set associative |
8-way set associative |
8-way set associative |
| Line size: | L1: 64 bytes | L1: 64 bytes | L2: 64 bytes |
Supported instructions
| Instruction set extensions | Additional instructions | ||
|---|---|---|---|
| MMX | CLFLUSH | ||
| SSE | CMOV | ||
| SSE2 | CMPXCHG16B | ||
| SSE3 | CMPXCHG8B | ||
| SSSE3 | FXSAVE/FXRSTORE | ||
| MONITOR/MWAIT | |||
| SYSENTER/SYSEXIT |
Integrated features and technologies
| Major features | Other features | ||
|---|---|---|---|
| On-chip Floating Point Unit | 36-bit page-size extensions | ||
| 64-bit / Intel 64 | 64-bit debug store | ||
| Enhanced SpeedStep | Advanced programmable interrupt controller | ||
| CPL qualified debug store | |||
| Debug store | |||
| Debugging extensions | |||
| Digital Thermal Sensor capability | |||
| LAHF/SAHF support in 64-bit mode | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Pending break enable | |||
| Perfmon and Debug capability | |||
| Physical address extensions | |||
| Self-snoop | |||
| 1 – Thermal monitor | |||
| 2 – Thermal monitor 2 | |||
| 3 – Thermal monitor and software controlled clock facilities | |||
| Time stamp counter | |||
| Virtual 8086-mode enhancements | |||
| xTPR Update Control |
